← 200mm Mature-Node
GlobalFoundries
Malta, NY, USA
Company Overview
- Headquarters
- Malta, NY, USA
- Ownership
- Public (Nasdaq: GFS); Mubadala (Abu Dhabi) is majority/controlling owner at ~77% (SEC Schedule 13G/A, Mar 2026)
- Total Fabs
- ~6-7 active fabs across 3 continents: Dresden (Fab 1), Singapore (Fab 2, 3/5, 7), Malta NY (Fab 8), Essex Junction VT (Fab 9, 200mm). Note: Fab 10 East Fishkill NY was sold to onsemi, completed Dec 2022
- 200mm Fab Locations
- Fab 9 (Essex Junction/Burlington, VT); Singapore Fab 2 also runs 200mm legacy nodes
- Wafer Sizes Run
- 200mm & 300mm
- Most Recent Revenue
- FY2025 revenue $6.791B; Q3 2025 $1.688B; Q4 2025 $1.83B
- Employees
- 14,346 as of Dec 2025 (FY2025 20-F)
- Major Segments
- Smart mobile, automotive, communications infrastructure & datacenter, IoT
- Long-Term Strategy
- "Differentiated essential chips" — specialty RF-SOI/22FDX/SiGe/photonics, not leading-edge digital; large 2026 capex step-up on oversubscribed demand
Process Technologies
No named process technologies recorded for this foundry yet.
Absence here means the process list has not been researched, not that the foundry offers none.
Technology Portfolio
- CMOS Min/Max Geometry
- 180nm-12nm (200mm lines: 180-90nm)
- CMOS Analog/RF/Mixed-Signal
- Strong RF-SOI, mixed-signal
- CMOS Embedded Memory
- Yes
- CMOS HV, Automotive-Qualified
- Yes (automotive-qualified)
- BCD Voltage Range
- Yes
- BCD LDMOS
- Yes
- BCD/SOI Isolation Option
- Yes
- SOI — PD-SOI
- Limited
- SOI — FD-SOI
- Yes — 22FDX flagship
- SOI — RF-SOI
- Yes — 45RFSOI etc.
- SOI — Photonics-Compatible
- Yes
- MEMS
- Limited
- Power — SiC
- Emerging
- Power — GaN
- Yes (new Fab 9 line)
- Power — HV CMOS
- Yes
- Specialty — eNVM
- Yes
- Specialty — CIS
- No
- Specialty — Photonics
- Yes (growing)
- Specialty — Display Driver
- Yes
Manufacturing Capability
- Qualified 200mm Fabs
- 2 (Fab 9 VT, Fab 10 NY) + 300mm sites
- Multi-Site Technology Transfer
- Yes — multi-site qualified for several platforms (e.g., 130BCDlite, 55nm)
- Automotive Production Volume
- Yes — established automotive supplier
- IATF 16949
- Yes (site-dependent, verify per fab)
- ISO 13485 (Medical)
- Not a primary focus — verify
- ISO 9001
- Yes
- AS9100 (Aerospace)
- Limited — verify
- Defense / Rad-Hard Experience
- Yes — US defense/DoD trusted-foundry heritage (former IBM Microelectronics/AMD fabs)
- Export Restriction Status
- Not export-restricted; CHIPS Act recipient with 10-yr China <28nm guardrail
Capacity & Supply Chain
- Typical Quoted Lead Time (200mm)
- Not publicly quoted — historically 12-20 weeks for mature nodes, verify current
- Recent Utilization
- ~70% (2025-26)
- Expansion Plans
- €1.1B Dresden Fab 1 expansion (→1.5M wafers/yr by end-2028); 2026 capex raised to 15-20% of revenue on photonics/22FDX/SiGe demand
- Geographic Redundancy
- Good — US (2 sites) + Germany + Singapore
- Single-Site Concentration Risk
- Low — genuinely multi-region
- Natural Disaster Exposure
- Low-moderate (US/Germany/Singapore all low seismic/storm risk relative to Taiwan)
- Utility Risk (Power/Water)
- Low — mature grids in all host countries
Fabs & Geopolitical Risk
| Fab Site | Country | US Import Tariff | Considerations | Risk |
|---|---|---|---|---|
| Fab 1 — Dresden | Germany (EU) | Not recorded | EU Chips Act support (€495M toward the €1.1B expansion); not exposed to US-China export-control friction directly | Low |
| Fab 7 — Singapore | Singapore | Not recorded | Singapore's neutral, US-aligned trade posture reduces risk; strategic Asian hub outside China | Low |
| Fab 9 — Essex Junction (Burlington), VT | United States | Not recorded | CHIPS Act recipient (constrains China tech transfer below 28nm for 10 yrs); low geopolitical friction | Low |
Cost & Commercial
- MPW Shuttle Availability
- Yes, via MOSIS and direct GF shuttle programs on select nodes (e.g., 180nm, 130BCDlite)
- Typical Mask Set Cost (Order of Magnitude)
- Mature node (130-180nm): low-to-mid six figures; advanced specialty (22FDX): higher
- Prototype/Engineering Wafer Pricing
- Not publicly listed — request via NDA/MOSIS
- Production Wafer Pricing Direction (2025–26)
- Flat to modestly up; capex guidance jumped from 8% to 15-20% of revenue for 2026
- Typical NRE Posture
- Standard TLA + NRE for direct production programs; MOSIS route lowers NRE for prototyping
- Packaging/Test Partnerships
- Broad OSAT network (Amkor, ASE, etc.) — verify current partner list
- Licensing / IP Fees
- Standard PDK/TLA licensing; IP core licensing via GF's IP partner ecosystem
Ecosystem
- Cadence
- Yes — Virtuoso analog/custom certified
- Synopsys
- Yes — Custom Compiler/Design Compiler certified
- Siemens EDA (Calibre)
- Yes — Calibre sign-off standard
- Notable IP Vendor Relationships
- Broad third-party analog/RF/memory IP ecosystem (verify current list)
- OSAT / Packaging Partners
- Amkor, ASE, and others (verify current list)
- Design-Service Partners
- Multiple regional design-service houses; MOSIS as an academic/prototyping broker
- University / Reference-Design Programs
- GF 180nm MCU (Efabless/Google open PDK program)
- Open-Source / Academic PDK
- Yes — GF 180nm MCU